Authors:	W. Bogaerts, U. Khan, Y. Xing
Title:	Layout-Aware Yield Prediction of Photonic Circuits
Format:	International Conference Proceedings
Publication date:	8/2018
Journal/Conference/Book:	IEEE International Conference on Group IV Photonics
Editor/Publisher:	IEEE,
Volume(Issue):	p.p93-93 (WD5)
Location:	Cancun, Mexico
DOI:	10.1109/GROUP4.2018.8478734
Citations:	4 (Dimensions.ai - last update: 24/11/2024) 4 (OpenCitations - last update: 27/6/2024) Look up on Google Scholar
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Abstract

We demonstrate yield prediction of silicon wavelength filter circuits using layout-aware Monte-Carlo circuit simulations. Maps of wafer and die-level variability of width and thickness are projected onto circuit layout and translated into changes of circuit model parameters. We apply this onto Mach-Zehnder lattice filters to study yield for different filter orders.

Related Research Topics

• Variability Aware Design

Related Projects

• FWO: G013815N-ScaleModel (Scalable behavioral models for large-scale silicon photonics)
• VLAIO: MEPIC (Model extraction to enable first-time right photonics integrated circuit design)