| Authors: | P. Absil, P. De Heyn, H. Chen, A. Srinivasan, P. Verheyen, S. Balakrishnan, G. Lepage, M. Pantouvaki, J. De Coster, G. Roelkens, D. Van Thourhout, J. Van Campenhout | | Title: | Isipp-200: a silicon photonics platform supporting optical data rates beyond 50Gb/s | | Format: | International Conference Presentation | | Publication date: | 2/2016 | | Journal/Conference/Book: | SPIE Photonics West 2016
(invited)
| | Location: | United States | | Citations: | Look up on Google Scholar
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Abstract
Silicon photonics has been selected by a growing number of industrial players to develop their next generation transceivers, typically towards 100GbE based on various 4x25Gb/s architectures. Future systems will aim at 400GbE relying on 8x50Gb/s architectures for instance. To support this bandwidth scaling imec has developed a single-chip silicon photonics solution capable of data rates at 50Gb/s and beyond. In this paper we will review the key building blocks of imec’s 200mm silicon photonics platform (ISIPP200) technology that enable modulation and detection at such data rates. |
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