| Authors: | S. Selvaraja, D. Van Thourhout, R. Baets, E. Sleeckx, M. Schaekers | | Title: | Deposited silicon-on-insulator material technology for photonic integrated circuitry | | Format: | International Conference Presentation | | Publication date: | 12/2007 | | Journal/Conference/Book: | 12th IEEE/LEOS Benelux Annual Symposium 2007
| | Editor/Publisher: | IEEE/LEOS Benelux chapter, | | Volume(Issue): | p.15-18 | | Location: | Brussels, Belgium | | Citations: | Look up on Google Scholar
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Abstract
With ever increasing complexity and density of photonic integrated circuits the need for multilayer functionality is arising for next generation photonic circuitry. As crystalline silicon is limited to single layer circuitry deposited silicon is one of the solutions for multilayer circuitry. Therefore, we explored two types of deposition technique for silicon: Low Pressure and Plasma Enhanced CVD process. The material properties are assessed for applicability by FTIR, XRD and AFM characterization. Finally, the propagation loss is measured at 1550nm wavelength range. We measured a propagation loss of 3.5 and 13.4dB/cm for 500nm photonic wire fabricated from PECVD and LPCVD process respectively. Related Research Topics
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